Digital circuits & system (EC-3002)

EC3002 - Digital circuits & system - RGPV notes CBGS

Objectives

To learn the basic methods for the design of digital circuits and provide the fundamental Concepts used in the design of digital systems.
To introduce basic postulates of Boolean algebra and shows the correlation between Boolean expressions
To introduce the methods for simplifying Boolean expressions
To outline the formal procedures for the analysis and design of combinational circuits andsequential circuits
To introduce the concept of memories and programmable logic devices.
To illustrate the concept of synchronous and asynchronous sequential circuits


Syllabus

UNIT 1:AND, OR, NOT, NAND, NOR, Exclusive–OR and Exclusive– NOR Implementations of Logic Functions using gates, NAND–NOR implementations – Multi level gate implementations- Multi output gate implementations.Introduction to number systems and binary operations. Boolean postulates and laws – De-Morgan’s Theorem - Principle of Duality, Boolean function, Canonical and standard forms,Minimization of Boolean functions, Minterm,Maxterm, Sum of Products (SOP), Product of Sums (POS),Karnaugh map Minimization, Don’t care conditions, Quine-McCluskey method of minimization.

UNIT 2: Half adder – Full Adder – Half subtractor - Full subtractor– Parallelbinary adder, parallel binary Subtractor – Fast Adder - Carry Look Ahead adder– Serial. Adder/Subtractor - BCD adder – Binary Multiplier – Binary Divider - Multiplexer/De-multiplexer – decoder - encoder – parity checker – parity generators – codeconverters - Magnitude Comparator.

UNIT 3: Latches, Flip-flops - SR, JK, D, T, and Master-Slave, Characteristic table and equation– Application table – Edge triggering – Level Triggering – Realization of one flip flopusing other flip flops – serial adder/subtractor.

UNIT 4: Asynchronous Ripple or serial counter. Asynchronous Up/Down counter - Synchronous counters – Synchronous Up/Downcounters – Programmable counters – Design of Synchronous counters: state diagram-State table –State minimization –State assignment - Excitation table and maps-Circuit. Implementation - Modulo–n counter, Registers – shift registers - Universal shift registers. Shift register counters – Ring counter – Shift counters - Sequence generators.

UNIT 5: Introduction to different logic families and their characteristics ,RTL,DTL,TTL, ECL, IIL,TTL inverter – circuit description and operation, CMOS inverter – circuit description and operation, other TTL and CMOS gates, ROM - ROM organization - PROM – EPROM – EEPROM –EAPROM, RAM – RAM organization Static RAM, Dynamic RAM, Programmable Logic Array (PLA) - Programmable Array Logic (PAL).


Chameli Devi Group Of Institutions [NOTES]


Outcomes

1. To introduce the concepts and techniques associated with the number systems and codes. To minimize the logical expressions using Boolean postulates.
2. To design various combinational and sequential circuits.


References

1. Anil K. Maini, Digital electronics Principles and Integrated circuits Wiley India Pvt. Ltd.
2. Anandkumar- fundamental of digital circuit. 3rd edition. PHI
3. John. F. Wakerly, Digital Design, Principles and Practices, Pearson Prentice Hall
4. John.M Yarbrough, Digital Logic Applications and Design, Thomson Learning, 2002.
5. Comer: Digital Logic & State Machine Design, Oxford Publication.
6. Donald D.Givone, Digital Principles and Design, TMH, 2003.
7. Ghosal- Digital electyronis, cengage learning.


List of Experiments

1. To verify the truth table of all basic logic gates and to implement all gate using universal gate.
2. Design of 4 bit Adders (CLA, CSA, CMA, Parallel adders)
3. Design of Binary Subtractors
4. Design of Encoder (8X3), Encoder(3X8)
5. Design of Multiplexer (8X1), and De-multiplexer (1X8)
6. Design of code converters & Comparator
7. Design of FF (SR, D, T, JK, and Master Slave with delays)
8. Design of registers using latches and flip-flops


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